Debut

DDR2 was alien in the additional division of 2003 at two antecedent alarm rates: 200 MHz (referred to as PC2-3200) and 266 MHz (PC2-4200). Both performed worse than the aboriginal DDR blueprint due to college latency, which fabricated absolute admission times longer. However, the aboriginal DDR technology acme out at a alarm amount about 200 MHz (400 MT/s). College achievement DDR chips exist, but JEDEC has declared that they will not be standardized. These modules are mostly architect optimizations of highest-yielding chips, cartoon decidedly added ability than slower-clocked modules, and usually do not action much, if any, greater real-world performance.

DDR2 started to become aggressive with the earlier DDR accepted by the end of 2004, as modules with lower latencies became available.5