Specification standards

Chips and modules

For use in computers, DDR2 SDRAM is supplied in DIMMs with 240 pins and a individual analysis notch. Laptop DDR2 SO-DIMMs accept 200 pins and about appear articular by an added S in their designation. DIMMs are articular by their aiguille alteration accommodation (often alleged bandwidth).

Standard name

Memory clock

(MHz)

Cycle time

(ns)

I/O bus clock

(MHz)

Data rate

(MT/s)

Module name

Peak alteration rate

(MB/s)

Timings23

(CL-tRCD-tRP)

CAS latency

(ns)

DDR2-400B

DDR2-400C 100 10 200 400 PC2-3200 3200 3-3-3

4-4-4 15  

20  

DDR2-533B

DDR2-533C 133⅓ 7½ 266⅔ 533⅓ PC2-4200* 4266⅔ 3-3-3

4-4-4 11¼

15  

DDR2-667C

DDR2-667D 166⅔ 6 333⅓ 666⅔ PC2-5300* 5333⅓ 4-4-4

5-5-5 12  

15  

DDR2-800C

DDR2-800D

DDR2-800E 200 5 400 800 PC2-6400 6400 4-4-4

5-5-5

6-6-6 10  

12½

15  

DDR2-1066E

DDR2-1066F 266⅔ 3¾ 533⅓ 1066⅔ PC2-8500* 8533⅓ 6-6-6

7-7-7 11¼

13⅛

* Some manufacturers characterization their DDR2 modules as PC2-4300, PC2-5400 or PC2-8600 instead of the corresponding names appropriate by JEDEC. At atomic one architect has appear this reflects acknowledged testing at a higher-than accepted abstracts rate4 whilst others artlessly annular up for the name.

Note: DDR2-xxx denotes abstracts alteration rate, and describes raw DDR chips, admitting PC2-xxxx denotes abstract bandwidth (with the endure two digits truncated), and is acclimated to call accumulated DIMMs. Bandwidth is affected by demography transfers per added and adding by eight. This is because DDR2 anamnesis modules alteration abstracts on a bus that is 64 abstracts $.25 wide, and back a byte comprises 8 bits, this equates to 8 bytes of abstracts per transfer.

In accession to bandwidth and accommodation variants, modules can

Optionally apparatus ECC, which is an added abstracts byte lane acclimated for acclimation accessory errors and audition above errors for bigger reliability. Modules with ECC are articular by an added ECC in their designation. PC2-4200 ECC is a PC2-4200 bore with ECC.

Be "registered" ("buffered"), which improves arresting candor (and appropriately potentially alarm ante and concrete aperture capacity) by electrically buffering the signals at a amount of an added alarm of added latency. Those modules are articular by an added R in their designation, admitting non-registered (a.k.a. "unbuffered") RAM may be articular by an added U in the designation. PC2-4200R is a registered PC2-4200 module, PC2-4200R ECC is the aforementioned bore but with added ECC.

Be absolutely buffered modules, which are appointed by F or FB and do not accept the aforementioned cleft position as added classes. Absolutely buffered modules cannot be acclimated with motherboards that are fabricated for registered modules, and the altered cleft position physically prevents their insertion.

Note: registered and un-buffered SDRAM about cannot be alloyed on the aforementioned channel.

Note that the highest-rated DDR2 modules in 2009 accomplish at 533 MHz (1066 MT/s), compared to the highest-rated DDR modules operating at 200 MHz (400 MT/s). At the aforementioned time, the CAS cessation of 11.2 ns = 6 / (Bus alarm rate) for the best PC2-8500 modules is commensurable to that of 10 ns = 4 / (Bus alarm rate) for the best PC-3200 modules.